Small form factor electronic systems are needed for internet of things devices (TOT), mobile devices, wearables, and autonomous vehicles. Since package area is limited in these systems, capacitors for power delivery require high capacitance densities (e.g., 10-10,000 nF/mm2), which requires ultra-high-k dielectric materials with relative permittivity of approximately 1,000-10,000. The dielectric materials used typically require annealing, sintering, or deposition at greater than 500 degrees C. These ultra-high-k dielectric materials are therefore deposited on rigid, high temperature substrates, and separately packaged and assembled on organic electronic packages.
Currently passive components such as capacitors, resistors, and inductors are discrete components that are attached to the substrate by component attach processes that include fluxing i.e., flux deposition, individual component pick and place, mass reflow and optionally deflux to remove any flux residue. Capacitors, are the majority of discrete components occupying a large area on the land side of the package (the side opposing the silicon die) and thus limiting the land-side area available for bumps or lands. This increases Z-height and adds assembly operations, which adds process time and cost, and becomes particularly challenging as these discrete components are miniaturized to sub-millimeter length scales and when many capacitors are required.